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SerDes Validation Engineer @ Sii Polska
  • Lublin
SerDes Validation Engineer @ Sii Polska
Lublin, Lublin, Lublin Voivodeship, Polska
Sii Polska
21. 10. 2025
Informacje o stanowisku

By joining us, you become a member of the Embedded Competence Center at Sii - an internal organizational unit, bringing together more than 500 specialists nationwide! We are currently working on projects for 50 clients from various industries, including automotive, IoT, telecommunications, and medical.
We are now looking for engineers to join a project that focuses on the automated testing and analysis of high-speed SerDes (Serializer/Deserializer) communication at the ASIC level.
The goal is to ensure robust chip-to-chip data transmission by verifying signal integrity, protocol compliance, and performance across multi-gigahertz frequencies.


  • Minimum 5 years of professional experience in embedded systems, ASIC, and hardware validation
  • Experience in test automation using Python and VBScript
  • Master of Science or Bachelor’s degree in Electronics, Computer Science, or a related field
  • Knowledge of electronics, measurement principles, and tools
  • Knowledge of ASIC
  • A good command of English

Nice-to-have requirements

  • Experience with HyperLynx or other signal integrity simulation tools

By joining us, you become a member of the Embedded Competence Center at Sii - an internal organizational unit, bringing together more than 500 specialists nationwide! We are currently working on projects for 50 clients from various industries, including automotive, IoT, telecommunications, and medical.
We are now looking for engineers to join a project that focuses on the automated testing and analysis of high-speed SerDes (Serializer/Deserializer) communication at the ASIC level.
The goal is to ensure robust chip-to-chip data transmission by verifying signal integrity, protocol compliance, and performance across multi-gigahertz frequencies.

,[Designing and automating test scripts for SerDes channel analysis, Running simulations with HyperLynx, Analysing waveforms and eye diagrams to detect signal degradation, Validating ASIC SerDes interfaces against communication protocols and performance criteria. Requirements: Python, ASIC, Hyperlynx Additionally: Sport subscription, Training budget, Private healthcare, Small teams, International projects, Free coffee, Free breakfast, No dress code, Modern office, In-house trainings.

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