A dynamic technology startup is seeking a Senior Verification Engineer in Kraków, Poland. In this role, you will be responsible for developing verification strategies and executing tests for advanced SoC designs. The successful candidate should have over 7 years of experience in verification engineering, specifically in SystemVerilog UVM, and should possess strong skills in pre-silicon verification. This position offers a unique opportunity to shape the future of AI solutions within a growing team.
#J-18808-Ljbffr