Informacje o stanowisku

technologies-expected :

• Python
• Git

• Our multinational technology client is currently seeking a Senior Verification Engineer to drive verification of DSP / RF signal-chain blocks, validating algorithms and ensuring functional correctness using UVM methodologies.

• Verify DSP / RF signal-chain designs
• Develop UVM-based testbenches
• Validate FFT, FIR, and channelizer algorithms
• Integrate VIP and support regression testing
• Work within CI/CD environments

• UVM, class-based verification
• DSP / RF verification (FFT, FIR, channelizer)
• Python scripting
• Git, CI/CD
• Adaptive SoC verification flows
• Vivado / Vitis

Warszawa - Oferty pracy w okolicznych lokalizacjach