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Senior Design Verification Engineer
  • Kraków
Senior Design Verification Engineer
Kraków, Kraków, Lesser Poland Voivodeship, Polska
microTECH Global Limited
13. 11. 2025
Informacje o stanowisku

We have had a very exciting opportunity become available for a Senior Design Verification Engineer in Poland.

ROLE: CsrC Design Verification Engineer

LOCATION: Krakow, Poland

SALARY: Negotiable

DURATION: Permanent and B2B available

About the Company

Our client are a leading provider of system IP and SoC integration automation technology, helping engineering teams accelerate system-on-chip (SoC) development with higher performance, lower power, and faster time-to-market. Our solutions power a wide range of electronic systems, from smartphones and automotive applications to datacenter and satellite technologies.

Role Overview

As a Senior Design Verification Engineer, you will work on the most advanced System-on-Chip (SoC) assembly and HSI flows. You will play a key role in influencing the development environment, architecture, and verification processes, contributing across the full SoC design lifecycle.

Key Responsibilities

  • Define, document, develop, and execute simulation-based verification tests for the Register Bank compiler tool, compatible with major RTL simulators (Cadence, Synopsys, Siemens).
  • Define, document, develop, and execute validation tests using Python scripting for qualifying additional Register tool collaterals (IP-XACT, C header files, documentation).
  • Maintain and enhance tests in the continuous integration flow, improve metrics, and increase automation.
  • Support improvements in processes, methodologies, and metrics.
  • Use modern tools for specifications, documentation, and project tracking (e.g., Confluence, Jira).
  • Collaborate with developers to identify EDA-specific testing needs and scenarios.
  • Participate in code reviews and unit testing with other developers to ensure code quality.

Experience & Qualifications

  • 7+ years of industry experience as an RTL Verification Engineer.
  • Strong expertise in the UVM framework.
  • Proficiency with hardware RTL design languages (VHDL, Verilog, SystemVerilog).
  • Skilled in Python scripting.
  • Knowledge of IP-XACT, C-HAL, and equivalence checking tools is a plus.
  • Strong written and verbal communication skills in English.
  • Curious, autonomous, rigorous, and delivery-oriented with a strong commitment to quality.

Education

  • Degree in Computer Science, Electronic Engineering, or a related field.

Languages

  • Fluent English
  • French proficiency is a plus

If you are interested, please get in touch and let’s have a conversation. You can share your CV with me at tee@microtech-global.com

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