About Us:

FortifyIQ is an exciting cyber security start-up company based in the US, founded 4 years ago by a successful entrepreneur. The FortifyIQ team has a vast knowledge of software and hardware development, cryptography algorithms, semiconductors, and cutting-edge hardware hacking methods.

Our mission is to advance maximum security against side-channel attacks across the entire computing spectrum. We accomplish this by offering pre-silicon evaluation tools built to test hardware designs against Differential Power Analysis and Fault Injection attacks, and by providing side-channel attack-resistant IP cores.

We offer a suite of software tools for chip designers and system integrators, allowing them to select ICs and design their own side-channel attack-resistant cryptographic IP cores—all without having to produce chips in silicon, or as FPGAs. We are dedicated to delivering high-quality products and services to our clients around the world. We are looking for a talented HW Logic Designer to join our dynamic team.

We are seeking a highly skilled and motivated HW Logic Designer to join our hardware development team. The ideal candidate will have a strong background in digital logic design, microarchitecture, and RTL coding. Experience with hardware description languages and FPGA/ASIC design processes is essential. Additionally, the candidate will be responsible for complex cryptographic IP block development and the implementation of patent-pending DPA countermeasures across front-end design—including microarchitecture specification, RTL code development, and verification. If you are passionate about hardware design and enjoy working in a fast-paced, innovative environment, we would like to meet you.

Requirements:

• Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or a related field.
• 4–5 years of hands-on experience in logic design, microarchitecture, and RTL coding in Verilog.
• Proven experience with VCS, Verdi, and Spyglass—or similar tools.
• Experience with FPGA design and implementation, including synthesis, place, and route.
• Familiarity with ASIC design and/or verification methodologies.
• Ability to write detailed, clear microarchitecture and verification reports
• Familiarity with CAD for ASIC design (Synopsys or Cadence). 
• Familiarity with formal verification between RTL and Netlist. 
• Familiarity with modern cryptography. 
• Strong problem-solving skills and attention to detail.
• Excellent communication and teamwork skills.
• Ability to work independently and manage multiple tasks effectively.

Preferred Qualifications:

• Experience with hardware simulation and verification tools (ModelSim, QuestaSim, etc.).
• Knowledge of high-speed interface protocols (PCIe, Ethernet, DDR, etc.).
• Understanding of SystemVerilog and UVM for verification.
• Experience with scripting languages (Python, Tcl, etc.) for automation.
• Knowledge and experience in cryptographic algorithms and countermeasure techniques such as Differential Power Analysis (DPA).

Key Responsibilities:

• Design, implement, and verify digital logic circuits and systems.
• Develop and maintain hardware description language (HDL) code, with a primary focus on Verilog/SystemVerilog
• Work on FPGA/ASIC design, synthesis, and verification, including hands-on RTL coding.
• Complex cryptographic IP block development and the implementation of patent-pending DPA countermeasures across front-end design—including microarchitecture specification, RTL code development, and verification.
• Collaborate with software, hardware, and verification engineers in design integration and testing.
• Perform timing power, performance, area analysis, and optimization to meet requirements.
• Participate in design and code reviews, and provide constructive feedback.
• Document design specifications, and interfaces.
• Stay up-to-date with the latest industry trends and technologies related to digital logic design.

What We Offer You:

• Competitive compensation, based on your experience and skills. Payments are made monthly via bank transfer/Payoneer/PayPal, according to invoices. 
• Remote work model. 
• Your work schedule will be Monday to Friday, from 10:00 to 19:00 EEST (including a one-hour break). 
• Opportunities for career growth and development. 
• Exposure to modern approaches and tools to solve business problems.

Visit our website to learn more about FortifyIQ’s vacancies, career opportunities, and reasons to join us.

https://www.fortifyiq.com/ipcores

https://www.fortifyiq.com/