.
FPGA/DSP Design Engineer
  • Warsaw
FPGA/DSP Design Engineer
Warszawa, Warsaw, Masovian Voivodeship, Polska
Microamp Solutions
25. 2. 2025
Informacje o stanowisku

Your work matters with us. We are a dynamic company implementing next-generation telecommunications technologies for global markets. We are looking for a Junior/Mid FPGA Engineer to join our growing team and contribute to the implementation of functionalities for the 5G mmWave Radio Unit.

Responsibilities:

  • Working on the newest technologies within 6G standardization.
  • Designing and developing FPGA-based solutions for 5G mmWave communication systems.
  • Collaborating with other engineers and project managers to ensure timely and successful project completion.
  • Participating in project planning and review meetings.
  • Developing and implementing testing procedures to ensure quality control and reliability of FPGA-based solutions.
  • Working with technical specifications and standards (3GPP, ETSI, OpenRAN).
  • PCB-level integration with hardware, software, and driver developers.
  • Troubleshooting and debugging FPGA-based systems.
  • Implementing the 5G stack (Low-PHY).

Minimum Requirements:

  • At least a bachelor’s degree in electrical engineering, telecommunications, computer science, or a related scientific field.
  • At least 1 year of experience in FPGA development.
  • Experience in FPGA design simulation and verification methods.
  • Experience in VHDL or Verilog programming languages.
  • Experience with AMD Xilinx, Altera, or other FPGA platforms.
  • Familiarity with system-level design and integration.
  • Strong problem-solving and troubleshooting skills.
  • Effective communication and teamwork skills.
  • Good English skills (spoken and written).

Good to Have:

  • Experience in RF communication systems, software-defined radio, and related technologies.
  • Experience in antenna arrays steering, beamforming, TDD waveforms.
  • Experience in C, C++, Python, MATLAB, Linux, Bash.
  • Embedded system design.
  • CI/CD and GIT.
  • ARM bare-metal firmware design.
  • Expertise in FPGA timing constraints and timing closure, clock domain crossing.
  • Experience with digital signal processing.
  • Knowledge of LTE/5G stack and standards.
  • Experience with high-speed protocols such as 10Gbit/s, 25Gbit/s, 100Gbit/s (SFP+, QSFP+) Ethernet, PCIe, etc.

Job Benefits:

  • Competitive compensation - 5,000 - 13,000 PLN gross (UOP or B2B).
  • Opportunity to join a fast-growing team at the early stage.
  • On-site or hybrid work.
  • Healthcare & sport packages.
  • Flexible working hours.
  • Integration events.
  • Great coffee and atmosphere.
#J-18808-Ljbffr

  • Praca Warszawa
  • Warszawa - Oferty pracy w okolicznych lokalizacjach


    91 114
    11 909